Amit Kulkarni

Amit Kulkarni

PhD researcher

Amit.Kulkarni[AT]Ugent.be
+32 9 264 33 78 (phone)

Computing Systems Lab (CSL)
Electronics and Information Systems (ELIS) department
Ghent University
iGent, Technologiepark - Zwijnaarde 15
9052 Ghent
Belgium


My research is about exploring the run-time reconfiguration of Field Programmable Gate Array (FPGA). Dynamic Circuit Specialization (DCS) is an optimization technique used for implementing a parameterized application on an FPGA. The application is said to be parameterized when some of its inputs, called parameters, are infrequently changing compared to the other inputs. Instead of implementing these parameter inputs as regular inputs, in the DCS approach these inputs are implemented as constants and the design is optimized for these constants. When the parameter values change, the design is re-optimized for the new constant values by reconfiguring the FPGA. Using this technique the configuration of the FPGA is specialized and reconfigured on the fly to better suit the problem at hand.

My research specifically focusses on improving the run time reconfiguration speed of an FPGA. Currently, my work is about exploring the barriers which are responsible for the deterioration of the reconfiguration speed  and optimize the same which suits to the architecture of the FPGA for high speed Dynamic Circuit Specialisation.

 

Research Project


Run-time reconfiguration in FPGAs



Contact person for Projects:


Publications to Appear



Publications


Journal papers

  1. Amit Kulkarni and Dirk Stroobandt MiCAP-Pro : a high speed custom reconfiguration controller for Dynamic Circuit Specialization DESIGN AUTOMATION FOR EMBEDDED SYSTEMS, pp. (2016)
  2. Amit Kulkarni and Dirk Stroobandt How to efficiently reconfigure tunable lookup tables for dynamic circuit specialization INTERNATIONAL JOURNAL OF RECONFIGURABLE COMPUTING, pp. 1-12 (2016)

Conference publications

  1. Mohamed El-Hadedy, Hristina Mihajloska, Danilo Gligoroski, Amit Kulkarni, Dirk Stroobandt and Kevin Skadron A 16-bit Reconfigurable encryption processor for Pi-Cipher 2016 IEEE International Parallel and Distributed Processing Symposium Workshops, pp. 162-171 (2016)
  2. Dirk Stroobandt, Ana Lucia Varbanescu, Catalin Bogdan Ciobanu, Muhammed Al Kadi, Andreas Brokalakis, George Charitopoulos, Tim Todman, Xinyu Niu, Dionisios Pnevmatikatos, Amit Kulkarni, Elias Vansteenkiste, Wayne Luk, Marco D Santambrogio, Donatella Sciuto, Michael Huebner, Tobias Becker, Georgi Gaydadjiev, Antonis Nikitakis and Alex JW Thom EXTRA : Towards the exploitation of eXascale technology for reconfigurable architectures Reconfigurable Communication-centric Systems-on-Chip, pp. 1-7 (2016)
  3. Amit Kulkarni, Elias Vansteenkiste, Dirk Stroobandt, Andreas Brokalakis and Antonios Nikitakis A fully parameterized virtual coarse grained reconfigurable array for high performance computing applications 2016 IEEE International Parallel and Distributed Processing Symposium Workshops, pp. 265-270 (2016)
  4. Amit Kulkarni, Vipin Kizheppatt and Dirk Stroobandt MiCAP : a custom reconfiguration controller for dynamic circuit specialization International Conference on ReConFigurable Computing and FPGAs, Proceedings, pp. 1-6 (2015)
  5. Amit Kulkarni, Robin Bonamy and Dirk Stroobandt Power measurements and analysis for dynamic circuit specialization International Conference on ReConFigurable Computing and FPGAs, Proceedings, pp. 1-6 (2015)
  6. Amit Kulkarni, Tom Davidson, Karel Heyse and Dirk Stroobandt Improving reconfiguration speed for dynamic circuit specialization using placement constraints International Conference on ReConFigurable Computing and FPGAs, Proceedings, pp. 1-6 (2014)
  7. Amit Kulkarni, Karel Heyse, Tom Davidson and Dirk Stroobandt Performance evaluation of dynamic circuit specialization on Xilinx FPGAs FPGAworld Conference 2014, Proceedings, pp. 6 (2014)

Other publications

  1. Amit Kulkarni, Dirk Stroobandt, Andre Werner, Florian Fricke and Michael Huebner Pixie: A heterogeneous Virtual Coarse-Grained Reconfigurable Array for high performance image processing applications 3rd International Workshop on Overlay Architectures for FPGAs (OLAF2017), pp. 1-6 (2017)